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winternitz-one-time-signature
Python winternitz package. Contains (probably) post-quantum secure digital signature algorithms. Currently WOTS and WOTS+ are implementedImplementation-of-an-artificial-neural-network-on-a-zynq7045-fpga-using-sdsoc
This repository contains a SDSoC Project which includes an implementation of a 3-layered artificial neural network (testphase only). It can be build for Xilinx Zynq FPGA. A SD-Card image for the ZC706 evaluation board is included, containing the implementation and a petalinux build. This project is part of a bachelor thesis in applied computer science. The thesis is included aswell but it is written in the german language.Masterthesis-Superorganism
(Substrate) Give the community the power to determine the next state of the system, let them work on it and reward them. An experimental decentralized democracy.snes-controller-driver-using-raspberry-pi-gpio
This project contains a linux kernel driver to include a super nintendo entertainment system controller as a joystick into the input subsystem, reading its states over (predefined) gpio pinsQuantumRisc-VM-Build-Tools
Ease RiscV hardware-software co-design development by easily setting up or using a pre-configured environmentImplementation-of-a-post-quantum-secure-blockchain-using-BPQS
This repository contains the documentation of a post-quantum secure ledger I implemented during a course in university. It uses my WOTS Python as the pqc signature library. The code is not included in this project, since it honestly was created in the last week after implementing the WOTS python package and planing the whole design. It therefore needs to be rewritten to be of any help. Nevertheless, it showed that this POC is possible. The Signature size was 4kB at max, 2 kB optimally. Check out https://www.youtube.com/watch?v=6bgd-V7Hsh4 to see a video showing and describing the PoC implementationqpu
A library for quantum processing units (IBM, D-Wave)Paper-Software-based-side-channel-attacks-on-CPUs
this paper focuses on presenting the chronological order of software based side-channel attacks on processors. This is achieved by introducing key attacks since 2003 in the chronological order, explaining how these attacks work and how they were fixed or worked around. Additionally, a small part of this paper focuses on the behaviour of computer scientists and computer users after the publication of such attacks. Why did we wait until the catastrophe happened?raspi2-stepper-lib
library to easily control a stepper motor on a raspberry pi 2Winning-Super-Mario-using-genetic-algorithms-german-
iter_storage_key_bug
offline-transaction-signer
Tool to generate signed transaction data for Ethereumsuperorganism
Community-driven communityvhdl-wishbone-intercon-generator
A python tool used to parse a simple config file, which describes the general configuration of the intercon itself and the wishbone components. Using this information this tool can create an adequate vhdl intercon moduleLove Open Source and this site? Check out how you can help us