rubinsteina13/SV_I2S_RX_CORE

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Rank 2,861,937 (Top 57 %)
Language SystemVerilog
License
MIT License
Created over 4 years ago
Updated over 4 years ago

rubinsteina13/SV_I2S_RX_CORE

rubinsteina13

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Synthesizable SystemVerilog IP-Core of the I2S Receiver

C_SVPWM_LIB

C-library with implementation of the Space-Vector PWM generation technique

C_INDUCTION_MOTOR_ESTIMATORS_LIB

C-library with implementation of the Induction Motor rotor speed anf flux estimators (observers)

C_PID_CONTROLLERS_LIB

C-library with floating point P, PI, PD, PID-controllers implementation

C_SPACE_VECTOR_TRANSFS_LIB

C-library with various space-vector transformation implementations

SV_CLARKE_TRANSFORMATION_CORES

Synthesizable SystemVerilog IP-Cores of the Forward and Backward Clarke Transformation

SV_DSM_CORE

Synthesizable SystemVerilog IP-Core of the First-Order Delta-Sigma Modulator