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sus-compiler
A new Hardware Design Language that keeps you in the driver's seatGPUInspector.jl
Inspecting GPUs with JuliaHPCC_FPGA
A OpenCL-based FPGA benchmark suite for HPCOMP-Offloading
MPITape.jl
Record MPI operations on tapeNetFPGA-10G-UPB-OpenFlow
An OpenFlow implementation for the NetFPGA-10G cardfft3d-fpga
FFTFPGA is an OpenCL based library for Fast Fourier Transformations for FPGAs. This repository provides OpenCL host code in the form of FFTW like APIs as well as OpenCL kernel designs that can be synthesized to bitstreams.StencilStream
StencilStream: Generic Stencil Simulation Library for FPGAscoldboot
Hardware Accelerated Cold-Boot Attacksslurm_jupyter_kernel
Manage (create, list, modify and delete) and starting jupyter kernels using sbatchcannon-fpga
stream-fpga
Implementation of the STREAM benchmark for FPGAAurora-HLS
Ready-to-link, packaged Aurora IP on four QSFP28 lanes, providing 100Gb/s throughputbaar
Binary Acceleration at RuntimeJHub-HPC-Interface
JupyterHub + High-Performance ComputingSubmatrixMethod
Massively parallel implementation for the approximate computation of inverse p-th roots of large sparse matricesCustoNN2
This repository deals with the use of an Open-source FPGA Plugin to execute Neural Networks on multiple Intel Stratix 10 FPGAs.XRT.jl
Julia wrapper around native XRT C++ API, a runtime for AI Engines and FPGA platformssus-lsp
ERIs-FPGA
Electron Repulsion Integrals on FPGAfrandom
Implementation of a Random Access benchmark for FPGAn-body-ring-solver
ChirpZ-FPGA
easybuild-jupyter
PCΒ² easyconfigs for Jupyterliftracc
Dynamic Shared Library Interposing Framework for Transparent Accelerator UtilizationFPGA-Infrastructure-Fixes
Workaround for various issues with FPGA toolchains and runtimestree-sitter-sus
Tree Sitter Parser for the SUS languagejupyter-code-server
Running VSCode Web IDE inside the Jupyter environment3d-systo-fpga
ishc
Insert Syntax Highlighted CodePivPav
An Open Source Circuit Library with Benchmarking FacilitiesDocThemePC2.jl
Documenter.jl Theme for PC2HiHiSpMV
HiHiSpMV is a Sparse Matrix with dense Vector multiplication (SpMV) accelerator for HBM equipped FPGAs.pdf-annotate
Mark PDF files as author copies using an automatically generated overlayHTrOP
This repository contains HTrOP, a prototype implementation to automatically generate and execute OpenCL code from sequential CPU code. Computational hotspots can be automatically identified and transparently offloaded to different resources (tested with CPU, GPGPU and Xeon Phi).ConvFPGA
an OpenCL based library for FFT-based convolution on FPGAsLove Open Source and this site? Check out how you can help us