olofk/wb_intercon olofk/wb_intercon

  • Stars
    star
    28
  • Rank 882,216 (Top 18 %)
  • Language Verilog
  • License
    ISC License
  • Created almost 10 years ago
  • Updated almost 2 years ago
Twitter logo Share LinkedIn logo Share Facebook logo Share
olofk/wb_intercon
github

olofk

Reviews

There are no reviews yet. Be the first to send feedback to the community and the maintainers!

Repository Details

Wishbone interconnect utilities

More Repositories

1

serv

SERV - The SErial RISC-V CPU
Verilog
1,229
star
2

fusesoc

Package manager and build abstraction tool for FPGA/ASIC development
Python
1,151
star
3

edalize

An abstraction library for interfacing EDA tools
Python
613
star
4

corescore

CoreScore
Verilog
109
star
5

ipyxact

Python-based IP-XACT parser
Python
108
star
6

vidbo

Virtual Development Board
C
52
star
7

fifo

Generic FIFO implementation with optional FWFT
Verilog
42
star
8

observer

Verilog
37
star
9

subservient

Small SERV-based SoC primarily for OpenMPW tapeout
Verilog
25
star
10

fusesocotb

Quick'n'dirty FuseSoC+cocotb example
Python
15
star
11

verilatio

A protocol for communicating with HDL simulations over websockets
10
star
12

cryptech-cores

Core description files for the Cryptech project
Tcl
6
star
13

de0_nano

Verilog
6
star
14

wb_bfm

Wishbone Bus Functional Model
Verilog
5
star
15

another_serv

SERV running Another World under Verilator
C
3
star
16

or1k-ipxact

IP-Xact files for OpenRISC-based systems
3
star
17

ipxact_gen

Python
3
star
18

ca_workshop_munich

Material for the CHIPS Alliance workshop in Munich
Verilog
2
star
19

fusesoc_vunit_demo

Demo project for FuseSoC + VUnit integration
VHDL
2
star
20

reset_test

Reset demo for blog post
Verilog
2
star
21

wb_streamer

Wishbone component for converting data streams to wishbone transactions
Verilog
2
star
22

pdklite

Verilog
2
star
23

de0_nano_ipxact

Verilog
2
star
24

stream_utils

Utility functions for data streams
Verilog
1
star
25

libaxis

Library of RTL components for AXI Stream infrastructure
VHDL
1
star
26

or1k_bootloaders

OpenRISC 1000-compatible bootloaders
Assembly
1
star