nietzhuang/RISC-V-SoC-Design nietzhuang/RISC-V-SoC-Design

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  • Language SystemVerilog
  • Created about 3 years ago
  • Updated about 3 years ago
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nietzhuang/RISC-V-SoC-Design
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nietzhuang

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Repository Details

Single RISC-V CPU attached on AMBA AHB with Instruction and Data memories.

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