• Stars
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    2
  • Language VHDL
  • License
    GNU General Publi...
  • Created almost 5 years ago
  • Updated about 4 years ago

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Repository Details

Modeling, Design and ASIC implementation of a tenth order FIR filter. This project has been developed in two versions: a basic one, and an improved one using 3-level unfolding and five stages pipeline.