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linux-on-litex-vexriscv
Linux on LiteX-VexRiscvlitex-boards
LiteX boards filesfpga_101
FPGA 101 lessons/labslinux-on-litex-rocket
Run 64-bit Linux on LiteX + RocketChiplitevideo
Small footprint and configurable video cores (Deprecated)litespi
Small footprint and configurable SPI corewishbone-utils
Utilities for working with a Wishbone bus in an embedded devicepythondata-cpu-rocket
Python module containing verilog files for rocket cpu (for use with LiteX).litehyperbus
Small footprint and configurable HyperBus corelitex-renode
Tools for using Renode.io from Antmicro with LiteX for simulationpythondata-cpu-blackparrot
Python module containing system_verilog files for blackparrot cpu (for use with LiteX).lxbe-tool
LiteX Build Environment tool.pythondata-auto
Scripts which automate the creation of the `litex.data` Python modules from various git repositories.pythondata-cpu-serv
Python module containing verilog files for serv cpu (for use with LiteX).pythondata-misc-usb_ohci
Python module containing verilog files for the Spinal-HDL USB OHCI core (for use with LiteX).litex-buildenv-udev
udev rules for LiteX BuildEnv supported boardspythondata-cpu-microwatt
Python module containing vhdl files for microwatt cpu (for use with LiteX).pythondata-cpu-ibex
Python module containing system_verilog files for ibex cpu (for use with LiteX).pythondata-misc-opentitan
Python module containing resources files for opentitan misc (for use with LiteX).barebox
pythondata-cpu-vexriscv_smp
Python module containing verilog files for VexRiscv SMP CPU (for use with LiteX).pythondata-cpu-picorv32
Python module containing verilog files for picorv32 cpu (for use with LiteX).conda-build-prepare
litex-on-profpga-systems
Experiment with LiteX on proFPGA systemslitex-conda-packages
Conda build recipes for the toolchains needed by LiteX / MiSoC firmwarejpeg_encoder_gsoc2017_ishan-bansal
JPEG Encoder project as part of GSOC2017 / Student: Ishan Bansalpythondata-software-picolibc
Python module containing data files for picolibc software (for use with LiteX).ber_analyzer_gsoc2018_harsh_gugale
BER Analyzer project as part of GSOC2018 / Student: Harsh Gugalepythondata-misc-tapcfg
Python module containing data files for tapcfg misc (for use with LiteX).pythondata-cpu-jcore
pythondata-cpu-mor1kx
Python module containing verilog files for mor1kx cpu (for use with LiteX).pythondata-software-compiler_rt
Python module containing data files for compiler_rt software (for use with LiteX).pythondata-cpu-marocchino
Python module containing verilog files for marocchino cpu (for use with LiteX).pythondata-cpu-cv32e40p
Python module containing system_verilog files for cv32e40p cpu (for use with LiteX).pythondata-cpu-lm32
Python module containing verilog files for lm32 cpu (for use with LiteX).pythondata-cpu-cva5
Python module containing system_verilog files for cva5 cpu (for use with LiteX).pythondata-cpu-cv32e41p
Python module containing system_verilog files for cv32e41p cpu (for use with LiteX).pythondata-cpu-cv32e40s
Python module containing system_verilog files for cv32e40s cpu (for use with LiteX).Love Open Source and this site? Check out how you can help us