Discover ilaydayaman/Pipelined-FFT-with-SDF-and-CORDIC Open Source

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Rank 2,099,232 (Top 42 %)
Language VHDL
License
MIT License
Created over 5 years ago
Updated over 5 years ago

ilaydayaman

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A Pipelined Radix-2 FFT with SDF Architecture for 2048 Points with the CORDIC Algorithm in the first stage and dedicated multipliers in the 9th and 10th stages

CNN_for_SLR

A trained Convolutional Neural Network implemented on ZedBoard Zynq-7000 FPGA.

Verilog

LuViRA_Dataset

Lund University Vision, Radio, and Audio (LuViRA) Dataset

Bachelor_Thesis

Implementation of Nist Tests on a Chaotic Random Number Generator Inside a System on Chip (Zynq®-7000 All Programmable SoC)

ilaydayaman/Pipelined-FFT-with-SDF-and-CORDIC

ilaydayaman

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