gpanders/fpga-design-template

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Language Tcl
Created almost 6 years ago
Updated over 1 year ago

gpanders/fpga-design-template

gpanders

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Project template for Xilinx-based FPGA designs

editorconfig.nvim

EditorConfig plugin for Neovim

ijq

Interactive jq (mirror)

nvim-parinfer

parinfer for Neovim

vim-medieval

Evaluate Markdown code blocks within Vim

nvim-moonwalk

Use any language that compiles to Lua in your Neovim configuration

vim-oldfiles

Improve Vim's native recent file history

meta-scipy

OpenEmbedded layer for scipy (ARCHIVED)

fennel-repl.nvim

A Fennel REPL that runs in Neovim

colmap-docker

Dockerized COLMAP

fzy.zig

Rewrite of fzy in Zig (mirror)

esp32-zig-starter

Starter project for using Zig with ESP IDF

fzf-prezto

fzf module for prezto zsh framework

ztags

Generate tags files for Zig projects

dotfiles

vim-scdoc

Vim runtime files for scdoc

vitis_example

Example project for Xilinx Vitis

zynqmp-boot-apps

Generate and install boot apps for the Zynq MPSoC device

passage

Password store using age

nvim-scpaste

gnss-signal-processing

GNSS Signal Processing (ASE 389P-7) [Spring 2017]

pushbroom

Sweep your filesystem free of clutter

homebrew-tap

Custom Homebrew formulae

adventofcode

7guis

DragIt

Source for the DragIt! Chrome/Chromium extension

vim-man

Read man pages in Vim

slackbots-cli

acciobook

meshtool

Data analysis tool for 3D surface meshes