elbehery95/BETA-processor

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MIT License
Created over 7 years ago
Updated over 7 years ago

elbehery95/BETA-processor

elbehery95

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MIT 6.004x Beta RISC processor Implemented and synthesized on an FPGA. This is the Verilog version of the Beta with all the testbenches required.

University-Projects

This is where all the projects i did for Online courses, Student activites, self projects are posted

i2c_draft_gsoc

A simple low power I2c slave, this is just a prototype

pandoc_assignment_template

A pandoc template for my assignments based on https://github.com/Wandmalfarbe/pandoc-latex-template