Discover ekiwi/custom-afl-instrumentation Open Source project

wellen: waveform datastructures in Rust. Fast VCD, FST and GHW parsing for waveform viewers.

wellen

A Modular Open-Source Hardware Fuzzing Framework

rtl-fuzz-lab

SystemVerilog

pynq

PYNQ with Chisel and Rust

Tcl

rtl-repair

Fast Symbolic Repair of Hardware Design Code

Project Repo for the Simulator Independent Coverage Research

simulator-independent-coverage

Native Rust implementation of the FST waveform format from GTKWave.

open-source-formal-verification-for-chisel

Jupyter Notebook

fst-native

Chisel Examples for the iCESugar FPGA Board

icesugar-chisel

A Chisel Integrated Specification and Verification Language.

paso

BitVector and Array Arithmetic library

baa

work in progress, playing around with btor2 in rust

patronus

chisel-sequences

sequence prototype

Experimental (formal) verification library for Chisel.

kiwi-formal

spec-impl

Contains a prototype implementation of a transactional verification algorithm that uses protocols to connect functional model and implementation.

transactional-verification-with-protocols

Verilog

picojava2-archive

PicoJava2 RTL sources which are published under the Sun Community Source License, which is NOT a Open Source license.

Verilog

ucta

micro controller trace analysis

guarded_atomic_actions

Materials to help you with the cs267 homework.

cs267-tutorials

chisel-verification-examples

Some experiments with loosely coupled components on microcontrollers.

components-next

an effort to develop a testing solution for rust on deeply embedded, bare metal targets

utest-rs

etm-test

Playing around with the micro controller execution tracing.

port of scanlime's SWD code for the esp8266 to xpcc

comparing-random-testing-and-bmc

Verilog

xpcc-swd

reimplementation of the serv core in Chisel (https://github.com/olofk/serv)

serv-chisel

a minimal usb cdc loopback implementation for the stm32f3 discovery board using xpcc

stm32f3-minimal-cdc

git import of the embedded jvm from Delft University of Technology http://darjeeling.sourceforge.net

darjeeling-jvm

Java

surfer

Fork of the original surfer repo for my own developments: https://gitlab.com/surfer-project/surfer

Generating FIRRTL from Python. Highly experimental. Do not use.

pyfirrtl

Manages access to microcontroller targets connected to our CI server.

etm

Some exercises for undergraduates that work on research with me.

undergrad-exercises

LLVM IR -> Python compiler from the hyper kernel ecosystem (https://github.com/locore/hv6)

irpy

pushing the boundaries of my understanding of c++

cpp-playground

playing around with MS prose

sorta

cpp-debugging-interactive-unit

Interactive instructional unit created as the course project for SCMATHE 220C at UC Berkeley.

JavaScript

ulader

backup battery powered bike lighting system inspired by the Forumslader project

AGS Script

ostfriesentee-examples

Example project for the Ostfriesentee embedded JVM.

Java

jade-mirror

unofficial git mirror of http://jade.tilab.com/developers/source-repository/

Java

python-compiler

Some helpful pluming for writing (DSL) compilers in python.