Discover egk696/InterNoC Open Source project

Stars
3
Rank 3,963,521 (Top 79 %)
Language VHDL
License
MIT License
Created about 7 years ago
Updated over 6 years ago

egk696

There are no reviews yet. Be the first to send feedback to the community and the maintainers!

A Network-on-Chip for the System-of-Systems Era, Enabling mixed interface communication between embedded devices (MCU, sensors etc.) over a common protcol stack

VHDL_FSM_Visualizer

A VHDL helper that visualizes FSM states and transitions by tracking, in real-time, a specified .vhd file

an-ethernet-controller

A lightweight Ethernet MAC Controller IP for FPGA prototyping

Scala

SimpleSMTScheduler

A simple SMT-based schedule generator for cyclic executives of real-time tasks

Python

EDAC_SDRAM_Controller

Mitigating Single-Event Upsets in COTS SDRAM using an EDAC SDRAM Controller

Verilog

InterChip_Bridge

A Fault Tolerant Globally-Asynchronous-Locally-Synchronous Inter-Chip Communication Bridge on FPGAs

VHDL

CPUAcceleration

A repository exploring and evaluating code performance techniques and execution times

FDSN

The code repository for the implementation of the system presented in the paper titled "Low Cost Open Architecture Fall Detection System Implemented as a Wireless Sensor Network"

C++

BOLM

Repository for the Body Orientation and Localation Monitoring project (https://hackaday.io/project/26166-body-orientation-and-localization-monitoring)

egk696/InterNoC

egk696

Reviews

Repository Details

More Repositories