Discover deardelia/CPUpipline-VerilogHDL Open Source project

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Created about 5 years ago
Updated about 5 years ago

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The basic language used in this project is Verilog and it is designed to handle the MIPS-based Instructions such as {nop, jr, addu, subu, slt, beq, addiu, ori, lui, lw, sw, j, jal}

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deardelia/CPUpipline-VerilogHDL

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