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damithkawshan/Image-Downsampling-Processor

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2
Language
Python
Created over 5 years ago
Updated about 4 years ago

damithkawshan/Image-Downsampling-Processor

damithkawshan

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Design and Implementation of RISC related processor using VERILOG HDL and XILINX SPARTAN-6 FPGA

FIR_BandpassFilter_KaiserWindow

Here is a matlab code for bandpass filter implementation based on kaiser window method. user can change parameters accordingly to get different cutoff frequencies,passband and stopband ripples.

Cache-Design-VERILOG

design of a memory sub system with cache memory

Radar-and-Navigation

Jupyter Notebook

Eye-Diagrams-Digital-Communications

Plot eye diagrams for BPSK and 4-PAM modulation techniques with and without AWGN