cnrv/learn-firrtl-by-tdd

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Created almost 7 years ago
Updated about 6 years ago

cnrv/learn-firrtl-by-tdd

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riscv-soc-book

关于RISC-V你所需要知道的一切

home

为推广RISC-V尽些薄力

rocket-chip-read

Comment on the rocket-chip source code

fpga-rocket-chip

Wrapper for Rocket-Chip on FPGAs

CNRV-FPU

Basic floating-point components for RISC-V processors

RVSC2023

RISC-V Summit China 2023

RVWC2021-slides

第一届 RISC-V 中国峰会的幻灯片等资料存放

floating-point-guide

《关于浮点运算：作为程序员都应该了解什么？》

RISCV-East-Asia-Biweekly-Sync

Biweekly Sync Meeting for RISC-V Software Ecosystem. Meeting time is more friendly for people living in East Asia.

riscv-innovations

RISC-V is where innovation happens!

riscv-notes

A collection of notes related to RISC-V before they are processed and digested

clone-helpers

Helper scripts used to clone RISC-V related git repos inside China.

OSEDA

Open-Source EDA workshop for RISC-V community

diplomacy

split from rocketchip, try to add test and doc to it.

RVSC2022-Slides

riscv-summit-china-website

This is the website repo for RISC-V Summit China.

RVSC2024

Repo for uploading slides and other materials of RISC-V Summit China 2024

translation-team

Translation Team for RISC-V Ecosystem. Driven by RISC-V China Community.

risc-v-mailing-list-tracker

Summarize and track the discussion and topics on risc-v mailing list.