Discover antmicro/lpddr4-test-board Open Source project

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Created over 3 years ago
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antmicro

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Experimental development board interfacing Xilinx Kintex-7 FPGA with LPDDR4 SDRAM

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Antmicro's open hardware baseboard for the NVIDIA Jetson Nano, TX2 NX and Xavier NX

378

scalenode-cm4-baseboard

Baseboard for Raspberry Pi 4 Compute Module optimized for clustering

124

fastvdma

Antmicro's fast, vendor-neutral DMA IP in Chisel

Scala

zynq-mkbootimage

An open source replacement of the Xilinx bootgen application.

litex-vexriscv-tensorflow-lite-demo

TF Lite demo on LiteX/VexRiscv soft RISC-V SoC on a Digilent Arty board

RobotFramework

android-camera-hal

V4L2-based Android Camera HAL driver.

C++

google-coral-baseboard

Antmicro's open hardware baseboard for the Google Coral i.MX8 + Edge TPU SoM

jetson-orin-baseboard

Baseboard targetting the NVIDIA Jetson Orin Nano and Jetson Orin NX

gerber2ems

Python

rowhammer-tester

Python

usb-test-suite-build

Cocotb (Python) based USB 1.1 test suite for FPGA IP, with testbenches for a variety of open source USB cores

Shell

Migrant

Fast and flexible serialization framework usable on undecorated classes.

snapdragon-845-baseboard

https://antmicro.com/blog/2022/04/open-source-snapdragon-845-baseboard/

sdi-mipi-bridge-hw

Antmicro's open hardware 3G SDI into MIPI CSI-2 converter

kenning

Python

kvm-aosp-jetson-nano

arvsom

System on Module based on StarFive 71x0 SoC.

raviewer

Raw image/video data analyzer

Python

zynq-video-board

Open Hardware carrier board supporting modules with Zynq 7000 All Programmable SoC devices.

ov9281-camera-board

Camera board with a pair of OmniVision OV9281 sensors

hdmi-mipi-bridge

Antmicro's open hardware HDMI into MIPI CSI-2 converter

artix-dc-scm

Experimental Xilinx Artix-7 driven Data Center Security Communication Module

kintex-410t-devboard

cocotb-verilator-build

Makefile

Packet.Net

Forked from http://sourceforge.net/projects/packetnet/

pyvidctrl

A simple TUI util to control V4L2 camera parameters

Python

kria-k26-devboard

Open source AMD Xilinx Kria UltraScale+ SoM baseboard

verilator-old-archived

C++

verilator-dynamic-scheduler-examples

Makefile

m2-pcie-adapter

Adapter card exposing M.2 (key-M) signals on PCIe x4 card edge socket.

m2-smart-iot-module

https://antmicro.com/blog/2021/08/open-hardware-smart-m2-radio-module-for-iot/

tensorflow-arduino-examples

TensorFlow Lite Micro examples built in collaboration between Google and Antmicro, runnable in Google Colab and with Renode CI tests

Shell

ecos

eCos 3.0 RTOS, with Xiilinx Zynq and NXP Vybrid support and other additions

pyrav4l2

Pythonic, Really Awesome V4L2 utility

Python

kenning-pipeline-manager

Vue

sdi-mipi-bridge

Antmicro's open source 3G SDI into MIPI CSI-2 converter

Shell

riscv-badge-hw

RISC-V Electronic Badge open source hardware project

thunderbolt-pcie-adapter

pyrenode3

Python

ecp5-dc-scm

Experimental Lattice ECP5-driven Data Center Security Communication Module

virtex-ultrascale-pcie

Makefile

tuttest

A simple Python utility for extracting documentation snippets from tutorials.

Python

grabthecam

C++

renode-verilator-integration

This repository contains a sample code integrating Renode with Verilator

CMake

dockersave

Python

usb-test-suite-cocotb-usb

Python

renode-board-visualization

HTML

embench-tester

Python

cvbs-mipi-bridge

renode-test-action

GitHub Action allowing to run tests in the Renode framework

Shell

linux-tk1

protoplaster

Python

fomu-keystroke-injector

FOMU keystroke injector

renode-beagle-v

renode-zephyr-tech-talk

python3-v4l2

python-v4l2 fork

Python

usb-test-suite-testbenches

Python

fpga-isp-core

Python

jswasi

TypeScript

topwrap

A Python package for generating HDL wrappers and top modules for HDL sources

Python

screen-recorder

A simple screen recorder using WebRTC

HTML

nvme-verilog-pcie

Verilog

meta-antmicro

BitBake

jetson-tx2-deep-learning-platform

Antmicro's open hardware platform for the NVIDIA Jetson TX2/TX2i family of SoMs

verilator-verification-features-tests

SystemVerilog

TermSharp

Terminal widget for XWT with VT100 support

imx7-taq-demo

video-overlays

Verilog

zephyr-cmock-unity-module

CMake

ctucanfd_ip_core

CAN with Flexible Data-rate IP Core developed at Department of Measurement of FEE CTU

VHDL

myst-editor

JavaScript

snickerdoodle-hdmi

Tcl

sdi-mipi-video-converter-hw

Video converter based on Lattice CrossLink-NX

sargraph

Python

ddr5-tester

ecos-mars-zx3

eCos 3.0 RTOS port for Enclustra's Mars ZX3 Zynq module

hardware-components

ecos-openrisc

distant-bes

Distant BES Client

Python

parallella-lcd-baseboard

An LCD-enabled baseboard for Parallella

zephyr-fpga-controller-examples

renode-rust-example

Rust

litex-linux-readme

distant-rec

Python

arty-expansion-board

IO expansion board compatible with Digilent Arty A7

renode-linux-runner-action

Run your tests in a configurable, emulated Linux environment with a custom kernel and access to virtual peripherals

Python

data-center-dram-tester

Experimental platform built around Xilinx Kintex-7 FPGA for development and customization of RAM controllers supporting RDIMM DDR4 RAM modules used in data centers.

visual-system-designer-app

Visual System Designer local app

Python

fmc-sata-adapter

Adapter board exposing SATA M.2 SSD on FMC board-to-board connector

riscv-badge-application

RISC-V Electronic Badge open source software Zephyr RTOS application

cpiosharp

Mono/.NET library for manipulating CPIO archives

fusesoc-verible-demo

FuseSoC and Verible integration demo

accelerator-interface-generator

Python

signal-integrity-test-board

rdfm

Python

parallella-lcd-fpga

VHDL

zephyr-on-litex-vexriscv-guide

sdi-mipi-bridge-fpga-design

Python

litex-vexriscv-i2s-demo

I2S demo on LiteX/VexRiscv soft RISC-V SoC on a Digilent Arty board

Shell

100

ahb-tl-bridge

SystemVerilog implementation of the AHB to TileLink UL (Uncached Lightweight) bridge

SystemVerilog

antmicro/lpddr4-test-board

antmicro

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