akilm/Physical-Design

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Created almost 4 years ago
Updated almost 4 years ago

akilm/Physical-Design

akilm

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Physical Design Flow from RTL to GDS using Opensource tools.

FPU-IEEE-754

Synthesizable Floating point unit written using Verilog. Supports 32-bit (Single-Precision) Multiplication, Addition and Division and Square Root Operations based on the IEEE-754 standard for floating point numbers

MYTH-RV32I-core-akilm

RV32I core using TL-Verilog.This project was done as a part of RISC-V based MYTH (Microprocessor for you in Thirty Hours) workshop organized by Kunal Ghosh and Steve Hoover

Controller-Design-for-Wind-driven-DC-Generator

Logic-Gates-Sizing-Automation

Determining the sizing of transistors using heuristic algorithms and logical effort to obtain optimal delay and power