agra-uni-bremen/opt-vp

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Language
C++
License
MIT License
Created over 1 year ago
Updated 8 months ago

agra-uni-bremen/opt-vp

agra-uni-bremen

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Virtual Prototype for identifying Application Specific Hardware Optimization candidates

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Constrained random stimuli generation for C++ and SystemC

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SpinalHDL based, FPGA Suitable RTL Implementation of RISC-V RV32. Aligned with RISC-V Virtual Prototype

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Symbolic execution for RISC-V machine code based on the formal LibRISCV ISA model

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A concolic testing engine for RISC-V embedded software with support for SystemC peripherals

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Constrained random stimuli generation for C++ and SystemC

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Extensible implementation of the RISC-V ISA based on FreeMonads

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Virtual Breadboard / PCB simulation for Prototyping and Educational Purposes

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Symbolic Execution of SystemC TLM Peripherals

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This Repo contains documentation to the HiFive1 Board along with some example programs.

verilog2GEXF

JAVA based verilog to Graph Exchange XML Format translator

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Eclipse based IDE that focuses on natural language processing tasks

opt-seq

An algorithm to merge RISC-V instruction sequences

clover

A library for concolic execution of RV32 instruction set simulators

vp-integration-tests

Tests for peripherals and other utilities of the riscv-vp

formal-iss

Generate an ISS for riscv-vp from a formal LibRISCV ISA model

sisl

Scheme-based Input Specification language for Concolic Testing

sisl-vp

Enhanced version of SymEx-VP with support for SISL, a input specification language for concolic testing

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An interactive visualization engine for reversible circuits