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  • Rank 264,508 (Top 6 %)
  • Language Verilog
  • Created about 7 years ago
  • Updated 10 months ago

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Repository Details

A collection of demonstration digital filters

This repository is designed to hold a variety of demonstration filters. These filters will be discussed and used as examples on the ZipCPU blog at zipcpu.com. If you watch carefully, you may find filters here before they are posted, as I'm going to be doing my development here. Still, there have been many posts already that you may find valuable. These include:

  1. A description (and implementation of) the two simplest filters I know of.

  2. A Generic FIR implementation

  3. A Simpler Generic FIR implementation

  4. A Moving Average/Boxcar Filter

  5. A Linear Feedback Shift Register (LFSR)

  6. Building a generic filtering test harness

  7. Delaying elements in a DSP system

  8. Generating a Pseudorandom noise stream via an LFSR

  9. Testing a generic filter using the test harness

  10. Building a slower filter, one that time-multiplexes a single one hardware multiply across many coefficients.

I have other filters built as well that I am looking forward to both writing about and adding to this repository. These include a symmetric filter, a halfband filter, or even a Hilbert transform. I've also got an example filter implementation that runs between system clocks, or another which allows a larger filter to be created from a simple cascade of smaller filter components--each of which runs between clock steps. These filters are likely to join the ones already present within this repository.

I also have code to support testing a filter in-situ, rather than just with Verilator. Whether or not I get to the point of presenting this code will need to be determined.

License

This repository is released under the terms and conditions of the LGPLv3. If these conditions are not sufficient for you and your purposes, other licenses terms are available for a minimal purchase price.

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