WenqiJiang/FPGA-Based-RNN-Accelerator-Using-Vivado-HLS WenqiJiang/FPGA-Based-RNN-Accelerator-Using-Vivado-HLS

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  • Language
    C++
  • Created almost 6 years ago
  • Updated over 5 years ago
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WenqiJiang/FPGA-Based-RNN-Accelerator-Using-Vivado-HLS
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WenqiJiang

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Repository Details

This is the first step to implement RNN on FPGAs. All modules are heavily commented. We will use High-Level Synthesis to turn these code into Hardware Description Languages (HDL).

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