UCLA-VAST/tapa-fast-cosim

Stars
2
Language VHDL
Created almost 3 years ago
Updated 6 months ago

UCLA-VAST/tapa-fast-cosim

UCLA-VAST

There are no reviews yet. Be the first to send feedback to the community and the maintainers!

Use a customized RTL testbench for cosim, avoid generating .xclbin

AutoSA

AutoSA: Polyhedral-Based Systolic Array Compiler

AutoBridge

[FPGA 2021, Best Paper Award] An automated floorplanning and pipelining tool for Vivado HLS.

RapidStream

[FPGA 2022, Best Paper Award] Parallel placement and routing of Vivado HLS dataflow designs.

FlexCNN

GNN-DSE

DAC'22 paper: "Automated Accelerator Optimization Aided by Graph Neural Networks"

minimap2-acceleration

Hardware Acceleration of Long Read Pairwise Overlapping in Genome Sequencing: Open Source Repository

hbmbench

blaze

Blaze runtime system that support efficient accelerator integration for big data.

AutoDSE

ACM TODAES Best Paper Award, 2022

splag

Accelerating SSSP for power-law graphs using an FPGA.

recut

Large-scale medical image processing and reconstruction toolbox

DPQA

CLINK

Compact LSTM inference kernel (CLINK) designed in C/HLS for FPGA implementation.

soda-compiler

Stencil with Optimized Dataflow Architecture Compiler

heterohalide

HeteroHalide: From Image Processing DSL to Efficient FPGA Acceleration

HT-Deflate-FPGA

HARP

ICCAD'23 Best Paper Award candidate: Robust GNN-based Representation Learning for HLS

TAPA-CS

Merlin-UCLA

cs-259-21f

Enola

adds

A Fast Work-Efficient GPU Algorithm for SSSP

Bonsai

DSE-for-HLS

EBMF

cs-259-graph500-sssp

cs-133-21w

Starter Kits for CS 133 (2021 Winter)

cs-259-w24