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garnet
Next generation CGRA generatorHalide-to-Hardware
aha
AhaM3SoC
SoC Based on ARM Cortex-M3lake
Lake is a framework for generating synthesizable memory modules from a high-level behavioral specification and widely-available memory macros.lassen
The PE for the second generation CGRA (garnet).CGRAFlowDoc
Documentation for the entire CGRAFlowCGRAFlow
Integration test for entire CGRA flowgemstone
CGRAMapper
CoreIR based mapping tool for CGRAPowerDomainDesign
TestBenchGenerator
canal
Primitives
Official Repo for keeping track of and defining all primitives.CGRAVerification
The current test and formal verification status for the CGRA.Applications
The applications for the Stanford AHA CGRAonyx
Configuration
aha-flow-app
hammer_implementation_flow
GarnetFlow
amber-vde
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