RPTU-EIS/UPEC-DIT

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RPTU-EIS/UPEC-DIT

RPTU-EIS

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This repository contains experiments and results on using UPEC to prove data-independent timing in hardware.

upec-boom-verification-suite

This repository contains the verification suite for verifying Berkeley Out-of-Order Machine (BOOM) against transient execution attacks based on the Unique Program Execution Checking (UPEC) approach.

RISCV-Core

5-stage RISC-V core (RV32IM) with pipelining designed for educational purposes by RPTU Kaiserslautern, Germany

SecureBOOM

Formally proven secure design of the RISC-V core BOOM (Berkeley Out-of-Order Machine) w.r.t. transient execution attacks (e.g., Meltdown and Spectre)

VDSProject

This repository contains the basic files for the class project of the course "Verification of Digital Systems"

symbolic-pmp

This repository contains a symbolic and secure configuration template for the RISC-V Physical Memory Protection (PMP) to be used in SV/SVA based verification flows.

ADSProject

This repository contains the basic files for the class project of the course "Architecture of Digital Systems I"

OpenTitan_with_Access_Control

OpenTitan Silver Release v5 copy for security improvements

Security-Conscious-Hardware

Collection of experiments on data-oblivious hardware designs that dynamically adjust their latency