MohamedSherifNoureldin/VerilogAlarmClock MohamedSherifNoureldin/VerilogAlarmClock

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    1
  • Language Verilog
  • Created almost 2 years ago
  • Updated almost 2 years ago
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MohamedSherifNoureldin/VerilogAlarmClock
github

MohamedSherifNoureldin

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Repository Details

A Digital Clock/Alarm System implemented using Verilog. The project was created using Vivado software and implemented on the Basys 3 FPGA board. This project was created for the Digital Desgin I (CSCE 2301) course.

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