LispEngineer/systemverilog-hdmi

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3
Rank 3,963,521 (Top 79 %)
Language SystemVerilog
Created almost 3 years ago
Updated almost 3 years ago

LispEngineer/systemverilog-hdmi

LispEngineer

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Implement HDMI output using only SystemVerilog and an Analog Devices ADV7513

genera-src

Source code for various Genera projects of Douglas Fields

aiband

Aiband, an AI roguelike built in Unity/Clojure using the Arcadia framework

screeps

Shared Screeps code

arcadia-hw

A basic tutorial for the Arcadia Unity Clojure system, starting with a "Hello World"

screeps-full

Now that I have retired from Screeps, I post my full code here for public amusement.

genera-patches

Genera 8.3 patches found from various sources

EthernetRepeater

A SystemVerilog implementation of a Ethernet Repeater targeting a Terasic DE2-115 and Marvell 88E1111 PHY

7drl2018

An entry for the 2018 Seven Day Roguelike Code Jam, in Unity 3D, Arcadia (Clojure) and C#

symbolics-console-protocol

Attempt to reverse engineer the symbolics console protocol and read it

sitlinv-1

Information and test Vivado files for an SITLINV Kintex-7 325T FPGA Board from AliExpress

symbolics-console-kbdm

Implementation of the Symbolics console Keyboard and Mouse input using standard PS/2 mouse and keyboard

Pretzil

Pretzil: Common Lisp Z-Machine interpreter. Forked from http://lisphacker.com/projects/pretzil/ for use as a validation tool against my GCZM Common Lisp Z-Machine interpreter for Genera

savageRoller

Dice roller for Savage Worlds targeting the M5 Cardputer