GraphSAINT/GNN-ARCH GraphSAINT/GNN-ARCH

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  • Language Verilog
  • Created over 4 years ago
  • Updated over 3 years ago
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GraphSAINT/GNN-ARCH
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GraphSAINT

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Repository Details

[ASAP 2020; FPGA 2020] Hardware architecture to accelerate GNNs (common IP modules for minibatch training and full batch inference)

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