GLADICOS/UART

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6
Rank 2,539,965 (Top 51 %)
Language Verilog
License
GNU General Publi...
Created almost 9 years ago
Updated about 2 years ago

GLADICOS/UART

GLADICOS

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This project provide the necessary to run a env test a simple uart verilog using SystemC and running it on icarus verilog

AES128

AES128 is a IP crypto core using modes ECB/CBC/CTR using vpi to functional verification

I2C

A i2C APB CORE MASTER AND SLAVE ASIC IP

SPACEWIRESYSTEMC

This is a test suit spacewire using a model on systemC with a verilog with graphical interface

CRCAHB

PADS

simple repo for any kind of pads used under verilog / system verilog