• Stars
    star
    7
  • Rank 2,294,772 (Top 46 %)
  • Language VHDL
  • License
    MIT License
  • Created over 3 years ago
  • Updated over 3 years ago

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Repository Details

This is a MIPS 5 stage 32-bit pipelined processor with Harvard architecture, which comes with an assembler to interpret instructions to supported OP codes.