Ashwin-Rajesh/RTL_Notes Ashwin-Rajesh/RTL_Notes

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    5
  • Rank 2,861,937 (Top 57 %)
  • Language Verilog
  • License
    MIT License
  • Created almost 3 years ago
  • Updated about 1 year ago
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Ashwin-Rajesh/RTL_Notes
github

Ashwin-Rajesh

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Repository Details

Notes I made on RTL design and verification. Currently has verilog, system verilog and formal verification notes

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