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FPGA-stereo-Camera-Basys3
Integration of two camera ๐ท modules to Basys 3 FPGARTK-NTRIP-RTCM
Contains program to Send RTCM3 ๐ก data to Hosted NTRIP server and fetch NTRIP data and display on another rover. Real time kinematic supported base and rover (Ublox-M8P) GPS units are required.FPGA-DepthMap-Basys3
Real Time depth map ๐๏ธ generation using SSD algorithm on low end Basys 3 FPGA. Support 320x240 and 160x120 resolutions.TrafficLightController
Design a sequential circuit (FSM) and implement using VerilogFPGA_depthMap
Using stereo vision ๐ to identify the obstacles by processing images on a FPGAStopWatch-Basys3
Stopwatch โฑ๏ธ implemented using Verilog with VivadoeKema
Machine learning for Paddy cultivationAREST
Simple Greedy algorithm AREST, which can find you the best state encoding for a given FSM that is resistant against Laser Fault Injection (LFI) attacks.Kobuki-Serial-Controller
Serial raw python implementation for controlling Kobuki Robot baseV2G
Verilog variables descriptions to graphs converting toolassert_NoC
Assertion based Network on Chip Security ImplementationsweetRV
sweetRV ๐ง is a SoC with a minimal RISC-V processor with firmware for IceSugar-Nano FPGAByteTorrent
DengAI
Solution to DengAI: Predicting Disease Spread HOSTED BY DRIVENDATASnpsTools
Simple beginner tutorial for Synopsys tool chain550_DRONE_CAD_PX4
3D model of the Final drone assembly for the SimulationProductCipher
Permutation and Random substitution text encryptorNanoProcessor
A simple microprocessor (hence, called a nanoprocessor) created using ISE design suite capable of executing a simple set of instructions.Love Open Source and this site? Check out how you can help us