Araf020/shift_register_verilog Araf020/shift_register_verilog

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  • Language Verilog
  • Created over 1 year ago
  • Updated over 1 year ago
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Araf020/shift_register_verilog
github

Araf020

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Repository Details

The aim of this project is to design vlsi layout of shift register using open source eda tools

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