Alaya-in-Matrix/CLaSH-Processor

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Rank 1,044,877 (Top 21 %)
Language
Haskell
Created almost 9 years ago
Updated over 6 years ago

Alaya-in-Matrix/CLaSH-Processor

Alaya-in-Matrix

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A simple processor running on FPGA written in Haskell(CLaSH) and compiled into verilog

MACE

code for the ICML2018 paper "Batch Bayesian Optimization via Multi-objective Acquisition Ensemble for Automated Analog Circuit Design"

pyMACE

Python implementation of the MACE Bayesian optimization algorithm, with GPy used as the backend GP library

NeuralLinear

Multi-output Gaussian process regression via multi-task neural network

clash-haskell-fpga

Using CLaSH to run haskell on FPGA

SparseGP

Sparse Gaussian process: VFE and SVI-GP

record-vim-time

record how long you have spent on vim per day

BNN

Bayesian neural network implementations

Hypervolume-HSO

Calculate hypervolume via Hypervolume by Slicing Objectives(HSO) algorithm.

Wrapper_Batch_BO

A simple wrapper of several batch bayesian optimization algorithms(LP,qKG,qEI)

priority_queue_haskell_fpga

use CLaSH to describe a priority queue and compile it to verilog

MOO

multi-objective optimization via differential evolution and non-dominated sorting

MVMO

C++ implementation of the Mean Variance Mapping Optimization algorithm

Chinese-chess

simple command line chinese chess game

fudanCourseProjectParallelYu

course project and home work of parallel architecture and programming