@chiselverify
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chiselverify

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  • Stars
    star
    172
  • Global Org. Rank 43,808 (Top 14 %)
  • Registered over 4 years ago
  • Most used languages
    Scala
         42.9 %
    TeX
         14.3 %
    Python
         14.3 %
    SystemVerilog     14.3 %
    VHDL     14.3 %

Top repositories

1

chiselverify

A dynamic verification library for Chisel.
Scala
138
star
2

vhdl2verilog

VHDL
13
star
3

documentation

Documentation surrounding the ChiselVerify project. This includes presentations and research papers written on the topic.
TeX
7
star
4

otherverify

Examples of verification solutions (e.g., UVM, cocotb,...)
SystemVerilog
6
star
5

class2020

Material for the class on verification of digital designs
Scala
4
star
6

explore-cocotb

Play around ith coctb and pyuvm
Python
2
star
7

jUvm

Verification of digital circuits in Java and Scala
Scala
2
star